1. Field of the Invention
Generally, the present disclosure relates to the manufacture of semiconductor devices, and, more specifically, to various novel masks for use during extreme ultraviolet (EUV) photolithography processes.
2. Description of the Related Art
The fabrication of advanced integrated circuits, such as CPU's, storage devices, ASIC's (application specific integrated circuits) and the like, requires the formation of a large number of circuit elements in a given chip area according to a specified circuit layout, wherein field effect transistors (NMOS and PMOS transistors) represent one important type of circuit element used in manufacturing such integrated circuit devices. In general, integrated circuit devices are formed by performing a number of process operations in a detailed sequence or process flow. Such process operations typically include deposition, etching, ion implantation, photolithography and heating processes that are performed in a very detailed sequence to produce the final device.
Device designers are under constant pressure to increase the operating speed and electrical performance of transistors and integrated circuit products that employ such transistors. One technique that continues to be employed to achieve such results is the reduction in size of the various devices, such as the gate length of the transistors. The gate length (the distance between the source and drain regions) on modern transistor devices may be approximately 22-50 nm, and further downward scaling is anticipated in the future. Manufacturing devices that are so small is a very difficult challenge, particularly for some processes, such as photolithography tools and techniques.
A typical photolithography process generally involves the steps of: (1) applying a layer of photoresist (a light-sensitive material) onto a wafer or substrate, typically accomplished by a spin-coating process; (2) pre-baking (or soft-baking) the layer of photoresist at a temperature of approximately 90-12° C. to reduce the level of solvents in the layer of photoresist and to improve the adhesion characteristics of the photoresist; (3) performing an exposure process, wherein a pattern on a reticle or mask is projected onto the layer of photoresist used in a lithographic exposure tool to create a latent image in the layer of photoresist; (4) performing a post-exposure bake on the layer of photoresist at a temperature approximately 5-15° C. higher than the pre-bake process; (5) performing a develop process to turn the latent image in the layer of photoresist into the final resist image; and (6) performing a post-bake process (or hard-bake) at a temperature of approximately 125-160° C. to remove residual solids and to improve adhesion of the patterned photoresist mask. These process steps result in a “post-litho” patterned etch mask that may be used for a variety of purposes, e.g., as an etch mask to form trench/hole type features in an underlying layer of insulating material. The above processes are well known to those skilled in the art and, thus, will not be described herein in any greater detail.
By way of background, photolithography tools and systems typically include a source of radiation at a desired wavelength, an optical system and, as noted above, a mask or reticle that contains a pattern that is desired to be formed on a wafer. Radiation is provided through or reflected off the mask or reticle to form an image on a light-sensitive layer of photoresist material that is formed on the surface of a semiconductor wafer. The radiation used in such systems may be light, such as ultraviolet light, deep ultraviolet light (DUV), vacuum ultraviolet light (VUV), extreme ultraviolet light (EUV), etc. The radiation may also be x-ray radiation, e-beam radiation, etc. Currently, most of the photolithography systems employed in semiconductor manufacturing operations are so-called deep ultraviolet systems (DUV) that generate radiation at a wavelength of 248 nm or 193 nm. However, the capabilities and limits of traditional DUV photolithography systems are being tested as device dimensions continue to shrink. This has led to the development of so-called extreme ultraviolet systems, i.e., EUV systems that use radiation with a much shorter wavelength, e.g., less than 20 nm, and, in some particular cases, about 13.5 nm. One fundamental difference between DUV systems and EUV systems involves the structure of the reticle, and the manner in which light interacts with the reticle. In a DUV system, light (from the light source) passes through the reticle and irradiates a layer of light-sensitive material. In contrast, in a EUV (or soft x-ray) light system, light (from the light source) is reflected off of an optical interference coating structure, a multi-layered mask, onto the light-sensitive material.
FIGS. 1A-1B depict one illustrative example of a prior art EUV mask 10. The mask 10 generally includes a substrate 12, a multilayer film stack 14, a cap layer 16 and an absorber layer 18. The multilayer stack 14 is comprised of a plurality of multilayer pairs, wherein each multilayer pair is comprised of a first layer 14A and a second layer 14B. In one example, the first layer 14A may be a layer of molybdenum and the second layer 14B may be a layer of silicon. Typically, in current-day technology, the mask 10 may include about 40-50 of such multilayer pairs. The thickness of the layers 14A, 14B is established such that incident light is reflected—in phase—from each of the interfaces in the multilayer stack 14.
The capping layer 16 is provided to make the mask 10 more chemically stable and more durable during use. Typically, the capping layer 16 may be a layer of ruthenium having a thickness of about 2 nm. The absorber 18 is comprised of one or more layers of material that are adapted to absorb incident light from the light source of the EUV system. For example, the absorber 18 may be comprised of a tantalum-based material, e.g., tantalum nitride or tantalum boron nitride, and it may have a thickness of about 50-70 nm. The various layers of material depicted in FIG. 1A may be formed by performing known manufacturing processes, e.g., physical vapor deposition (PVD), electron beam deposition (EBD), chemical vapor deposition (CVD), plasma-enhanced versions of such processes, etc.
FIG. 1B depicts the mask 10 after a patterning process operation was performed on the absorber 18 to define a patterned absorber layer 18A that contains the pattern that is to ultimately be imaged onto a layer of photoresist material. Traditional photolithography and etching techniques may be used to produce the patterned absorber layer 18A. Traditional photolithography can be used to pattern the absorber 18 as the pattern in the absorber 18A is four times larger (a 4× magnification) than the actual pattern to be formed in the layer of photoresist material. Typically, such a prior art mask 10 may have an efficiency of up to around 70-75%, i.e., the mask 10 reflects from 65-75% of the incident light 20 (the reflected light is depicted by dashed arrow 22).
One problem with the prior art mask 10 is related to the thickness of the absorber 18, which, as noted above, may be about 50-70 nm using materials traditionally used for the absorber 18. Theoretically, there are some materials that might be used for the absorber that may be formed to a lesser thickness, e.g., about 30 nm. However, these thinner absorber materials have never been used in production environments. The use of the relatively thick absorber materials results in significant shadowing of the incident light 20 in an EUV mask. That is, the thickness of the absorber 18 (about 50-70 nm) is about 3.5-4 times the 13.5 nm wavelength of the EUV light used in EUV systems. Such shadowing can cause significant errors in the photolithography process, e.g., pattern placement errors, line width errors, etc. Moreover, the thicker absorber 18 mandates that the incident light 22 hit the mask 10 at a lower angle of incidence, since, from pure geometrical considerations, the shadowing increases with higher angles of incidence. The maximum angle of a ray impinging on a mask increases with numerical aperture (NA), but a high NA is necessary to get to finer resolutions in EUV lithographic stepper-scanners. Simply decreasing the thickness 18T of the absorber 18 is not readily available as current-day absorbers are made about as thin as possible given absorption coefficient of materials that are typically used to make the absorber 18. Moreover, simply decreasing the thickness of the absorber may lead to an increase in “leakage” of the patterned absorber 18A, i.e., a thinner absorber may not be as effective in blocking the incident light 22 as a thicker absorber 18A, which also may result in patterning errors.
The present invention is directed to various masks for use during EUV photolithography processes that may reduce or eliminate one or more of the problems identified above.